In high-frequency PCB boards, one of the more important types of interference is power supply noise. This article systematically analyzes the characteristics and causes of power supply noise appearing on the high-frequency PCB board, and combines engineering applications to propose some very effective and simple solutions.
Analysis of power supply noise
Power supply noise is noise that is generated or disturbed by the power supply itself. The interference is manifested in the following aspects:
1) Distributed noise caused by the inherent impedance of the power supply itself. In high-frequency circuits, power supply noise has a large influence on high-frequency signals. Therefore, a low noise power supply is first required. A clean ground and a clean power supply are just as important.
Ideally, the power supply is impedance-free, so there is no noise. However, in practice, the power supply has a certain impedance, and the impedance is distributed over the entire power supply, so noise is also superimposed on the power supply. Therefore, the impedance of the power supply should be reduced as much as possible. It is better to have a dedicated power plane and ground plane. In high-frequency circuit design, it is generally better to design the power supply in layers rather than in the form of a bus, so that the loop can always follow the path with the least impedance. In addition, the power board provides a signal loop for all generated and received signals on the PCB, which minimizes the signal loop and reduces noise.
2) Common mode field interference. Refers to the noise between the power supply and the ground. It is caused by the interference caused by a loop formed by the disturbed circuit and the common mode voltage caused by the common reference surface. The value depends on the relative electric field and magnetic field. Strength is weak.
On this channel, the drop in Ic causes a common-mode voltage in the series current loop, affecting the receiving portion. If the magnetic field dominates, the value of the common mode voltage generated in the series ground loop is:
ΔB in the formula (1) is the amount of change in the magnetic induction intensity, Wb/m2; S is the area, m2.
If it is an electromagnetic field, when its electric field value is known, its induced voltage is
Equation (2) is generally applicable to L=150/F or less, and F is the electromagnetic wave frequency of MHz.
If this limit is exceeded, the calculation of the maximum induced voltage can be simplified as:
3) Differential mode field interference. Refers to the interference between the power supply and the input and output power lines. In the actual PCB design, the author found that its proportion in power supply noise is very small, so it can be omitted here.
4) Interline interference. Refers to interference between power lines. When there is mutual capacitance C and mutual inductance M1-2 between two different parallel circuits, if there is voltage VC and current IC in the interference source circuit, it will appear in the interfered circuit:
a. The voltage coupled through the capacitive impedance is
In equation (4), RV is the parallel value of the near-end resistance and the far-end resistance of the interfered circuit.
b. Series resistance through inductive coupling
If there is common mode noise in the interference source, the interline interference generally appears in both common mode and differential mode.
5) Power line coupling. It refers to the phenomenon that the power line will transmit these interferences to other devices after the AC or DC power line is subjected to electromagnetic interference. This is the interference of the power supply noise indirectly on the high frequency circuit. It should be noted that the noise of the power supply is not necessarily generated by itself, or it may be the noise of the external interference induction, and then the noise is superimposed (radiated or conducted) with the noise generated by itself to interfere with other circuits or devices.
Countermeasures to eliminate power supply noise interference
In view of the different manifestations and causes of the power supply noise interference analyzed above, the conditions of the occurrence of the power supply noise can be specifically destroyed, and the interference of the power supply noise can be effectively suppressed. The solutions are:
1) Pay attention to the through holes on the board. The through holes make it necessary to etch the openings on the power supply layer to allow space for the through holes to pass. If the power layer opening is too large, it will affect the signal loop, the signal will be forced to bypass, the loop area will increase, the noise will increase, and if some signal lines are concentrated near the opening, sharing this loop, the common impedance will cause crosstalk.
2) The cable requires enough ground wire. Each signal needs its own proprietary signal loop, and the loop area of the signal and loop is as small as possible, that is, the signal is parallel to the loop.
3) Place the power supply noise filter. It can effectively suppress the noise inside the power supply and improve the anti-interference and safety of the system. And it is a two-way RF filter that not only filters out noise interference introduced from the power line (prevents interference from other devices), but also filters out the noise generated by itself (to avoid interference with other devices), and cross-mode common mode interference. Both inhibit.
4) Power isolation transformer. Separate the common-mode ground loop of the power supply loop or signal cable to effectively isolate the common-mode loop current generated at high frequencies.
5) Power regulator. Regaining a cleaner power supply can greatly reduce the power supply noise.
6) Wiring. The input and output lines of the power supply should be avoided at the edge of the dielectric board, otherwise it will easily generate radiation and interfere with other circuits or equipment.
7) The analog and digital power supplies should be separated. High frequency devices are generally very sensitive to digital noise, so the two should be separated and connected together at the entrance to the power supply. If the signal is to cross both analog and digital, a loop can be placed across the signal to reduce the loop area.
8) Avoid separate power supplies that overlap between different layers. Try to stagger it, otherwise the power supply noise is easily coupled through parasitic capacitance.
9) Isolate sensitive components. Some components, such as phase-locked loops (PLLs), are very sensitive to power supply noise and should be kept as far as possible from the power supply.
10) Place the power cord. In order to reduce the signal loop, noise reduction can be achieved by placing a power line on the side of the signal line, as shown in Figure 5.
11) In order to prevent the accumulated noise caused by the interference of the power supply noise on the circuit board and the external power supply interference, the bypass path can be grounded on the interference path (excluding the radiation), so that the noise can be bypassed to the ground to avoid Interfere with other devices and devices.
Power supply noise is generated directly or indirectly from the power supply and interferes with the circuit. When suppressing its influence on the circuit, a general principle should be followed, that is, on the one hand, the power supply noise should be prevented as much as possible. The influence of the circuit, on the other hand, should also minimize the influence of the outside world or the circuit on the power supply, so as not to deteriorate the noise of the power supply.